piclist-bounces@mit.edu wrote: >> -----Original Message----- >> From: piclist-bounces@mit.edu On Behalf Of Phil Keller >> Sent: Thursday, January 18, 2007 1:42 PM >> >> The reference I was using for via size is: >> http://www.ultracad.com/articles/viacurrents.pdf >> >> The fab house I use has a trace thickness of 1.3mil-2mil (standard >> 1oz/sqft) and a via wall thickness of 0.8mil-1.2mil. >> >> Phil > > Since the via plating can be almost 1/2 the minimum trace > thickness, I'd use a factor of 2 for safety. So with 40mil > selected for regular traces your total calculation is > (40mil/pi)*2 =~ 25.5. Then of course increase it for extra safety. I just couldn't resist getting out the pen and paper. If maintaining the same cross-sectional area is the only concern, then you need a via with OD 21.5 mil and ID 19.9 mil to give you the same cross-sectional area as a 40 mil by 1.3 mil trace. I like your approximating much better than the ultracad pdf. Note how the via is specified becomes important. Do you give the mfg. an inner diameter and let them pick the drill, or do you give them actual drill sizes? Note the TI document in the link Vasile posted does say plated copper has a higher resistivity. I don't think an incandescent at 1A is a critical application, so I wouldn't worry about the via too much in this particular case. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist