>-----Original Message-----
>From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] 
>On Behalf Of Jinx
>Sent: 17 January 2007 05:12
>To: Microcontroller discussion list - Public.
>Subject: Re: [EE] B+ disconnect
>
>
>> However, be very carefull not to exceed Vgs(max) which is 
>often in the 
>> 10-12v range.  Carefull selection of the two resistors shown in your 
>> schematic connected to the gate will limit the maximum gate voltage.
>> 
>> HTH
>
>Yes, it do
>
>So, with a good battery and no signal from the PIC, source 
>will have 13.5V on it, and 13.5 on the gate, Vgs = 0V. Then 
>the gate should not go below 1.5V to keep Vgs >= 12V (assuming 
>12V limit) ?
>
>The pdf for the IRF5800TR says Vgs of +/- 20V. It also has a 
>diagram (Fig 12) showing Ron vs Vgs. Lowest Ron is at Vgs of 
>15V, and that's only a little lower than Vgs = 12V
>
>>From those figures then, would it be correct that the gate on this FET
>can safely be pulled up with a gate resistor to B+ and pulled 
>to ground with the PIC ?

Yes that would be fine as long as there is no possibility of 20v+ transients on the B+ line.

Sorry for late reply was out of work yesterday.

Cheers

Mike

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