> However, be very carefull not to exceed Vgs(max) which is often in > the 10-12v range. Carefull selection of the two resistors shown in > your schematic connected to the gate will limit the maximum gate voltage. > > HTH Yes, it do So, with a good battery and no signal from the PIC, source will have 13.5V on it, and 13.5 on the gate, Vgs = 0V. Then the gate should not go below 1.5V to keep Vgs >= 12V (assuming 12V limit) ? The pdf for the IRF5800TR says Vgs of +/- 20V. It also has a diagram (Fig 12) showing Ron vs Vgs. Lowest Ron is at Vgs of 15V, and that's only a little lower than Vgs = 12V >From those figures then, would it be correct that the gate on this FET can safely be pulled up with a gate resistor to B+ and pulled to ground with the PIC ? -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist