Alan B. Pearce wrote: >> The easiest way is to stay off the bleeding edge, >> and wait for the mext revison to come out. >> > > Doesn't always work out that way for a couple of reasons ... > > 1. Microchip seem to reuse the VHDL for individual modules between all > processors in a family, but the support teams for individual chips don't > seem to talk to each other. See the recent thread where )IIRC) Bob Blick was > having a problem with EEPROMs in a 12F series chip, and I pointed him at > what sounded like a similar problem in 16F627/8 chips, but it wasn't noted > as an errata for the 12F chips he was using. > Actually, that was me (Bob Axtell). I finally alerted Microchip. They wanted to know the datecode, which, because I had shipped all 50 PIC12F629's used, I couldn't provide. But one just popped up on the floor of the lab a few days ago, and I can now provide that. Indeed, your suggestion solved the problem for me. > 2. There is no way of knowing when Microchip change the silicon revision > until you actually purchase chips and check the revision. So you could wait > forever without knowing if they even fixed the bug ... > > They need to have a formal announcement of silicon revisions, and WHY it was revised, to keep us from being driven nuts. --Bob -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist