>The easiest way is to stay off the bleeding edge, >and wait for the mext revison to come out. Doesn't always work out that way for a couple of reasons ... 1. Microchip seem to reuse the VHDL for individual modules between all processors in a family, but the support teams for individual chips don't seem to talk to each other. See the recent thread where )IIRC) Bob Blick was having a problem with EEPROMs in a 12F series chip, and I pointed him at what sounded like a similar problem in 16F627/8 chips, but it wasn't noted as an errata for the 12F chips he was using. 2. There is no way of knowing when Microchip change the silicon revision until you actually purchase chips and check the revision. So you could wait forever without knowing if they even fixed the bug ... -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist