OK...forgot about the access bit, but it should have worked since the reg value is located at 0x46 register space. Now, if I set the access bit to 1, it works. But....if I move the register to the beginning of the space..ie....0x20, it works with no access bit set. It caught me off guard since it had been working but then I added in some additional registers inbetween so it pushed it further down the register space. So if ignoring BSR allows you to register the first 128 bytes....and I had it located at 0x46 (dec 71) then it should have worked in anycase? peter green wrote: > -----Original Message----- > From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu]On Behalf > Of alan smith > Sent: 08 December 2006 20:31 > To: Microcontroller discussion list - Public. > Subject: [PIC] movwf vs movff > > > Running under the simulation mode....18F family > > movlw .3 > movwf storageReg > > vs > > movlw .3 > movff WREG,storageReg > > In the first case, while viewing in the watch window, > storageReg never gets the value. > Second case, it does. > > Any clues why this might be? where is storageReg located? iirc mpasm defaults to access bank operations (which don't require setting of the BSR but only allow access to the first 128 bytes of memory and the special function registers) when you don't specify the thirc parameter. (and yes this is the opposite of what the pics datasheet says) movff otoh allows direct access to stuff in any bank without having to use the BSR. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist --------------------------------- Cheap Talk? Check out Yahoo! Messenger's low PC-to-Phone call rates. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist