> On 12/4/06, Wouter van Ooijen <wouter@voti.nl> wrote:
> > > Can you give an example of a flash PIC where M'chip =

> recommends this?
> > > I looked through the programming specs once, and only found this
> > > distinction for PROM based chips.  Admittedly, my search wasn't
> > > exhaustive.
> =


Most Interesting. I found the following in AN910
"PICmicro=AE Device Programming: What You Always
Wanted to Know (But Didn't Know Who to Ask)"
Page 16
Quote Follows...
VERIFICATION
Reading back a program memory location and verifying
its contents is a highly recommended practice; it makes
certain that each memory cell has been properly written
or erased. Regardless of the memory technology, all
programming algorithms include a read-back step
immediately following the write. This is done with a
"Read Data" command for devices using the mid-range
method, or a Table Read for PIC18 devices.
For OTP devices, a major issue in verification has been
establishing the parameters for a properly programmed
location. Minute differences in cells may mean that a
cell properly written to at the operating VDD might not
show as properly erased at VDDMIN, or not be
consistently read as programmed at VDDMAX.
With these possibilities in mind, Microchip has
developed programming algorithms that take these
possibilities in account. When the memory has been
completely programmed, verification is performed at
both the VDDMIN and VDDMAX of the part. This method,
known as intelligent verification, ensures that each cell
has a good "program margin" (it will read correctly
across the entire operating range) as well as a good
"erase margin" (it will consistently read as '1' after
being erased). The need for a range of supply voltages
is one reason why ICSP specifications have called for
a well-regulated supply voltage with a resolution of
=B10.25V.
The majority of Flash devices do not require the
intelligent verification algorithm. The same internal
write timing that makes overprogramming unnecessary
also provides an adequate programming margin for
each cell across the entire operating range. All that is
required for verification is a successful read-back at the
device's operating voltage. The reliability of Flash
technology has eliminated the need for intelligent verification
in those algorithms and the =B10.25V resolution
requirement for VDD. (A well regulated power supply, of
course, is still a good idea.)

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