Solved the issue of having the slave PIC locking up the I2C, didnt have the CKP bit enabled. So now, the master is sending data to the devices on its board, and connected to the slave PIC and the master is simply cycling sending a bit pattern to the slave devices, and I can see the bits toggling on the slave devices. I have the slave PIC set with an address of 0x80, and when running in the debugger, I can see where it does respond to the address (if I change the address in the slave it stops setting the SSPIF bit) so I am quite sure its listening. And in the master, I've duplicated the same routines thats sending to the slave devices of a address, command word and data word, to the slave PIC. But, I'm not seeing anything but the address, the D/A bit never gets set in the SSPSTAT register. But, it still gets the stop bit so the sequence is working,its getting acks, etc. When in a master mode, after sending the start bit, it assumes the first word is address, and everything that follows until the stop bit is data? The same with the slave device..first word after the start bit is address...then everything follows is data? Just confused why I am not seeing the data words. I've lent off my analyzer so I havent been able to look at the data and clocks. --------------------------------- Check out the all-new Yahoo! Mail beta - Fire up a more powerful email and get things done faster. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist