Has anyone had any problems (other than the 'clock must be in idle state when SPI enabled' issue mentioned in the errate) with SPI slave mode on the 16F devices (16F818 in particular)? I'm seeing very occasional random data errors when the slave sends data, consistent with either new data not getting latched into sspbuf, or SSPIF getting set too early - It is quite probably my bug, and I'm still delving into the problem to narrow it down, but what makes me suspicious of a possible silicon issue is that it only manifests itself on the chip, not ICE2000. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist