request a datasheet: http://www.via.com.tw/en/support/search/IGResult.jsp?query=VT1622&search.x=46&search.y=8 Any long route will create clock skew. So, if you have clock route of about 20cm lenght or so, it's very possible to have different clock phase between the source and the load. So everything depends of clock frequency and how good is adapted om every chip input. On 11/5/06, Mircea Chiriciuc wrote: > I have built a 24 input to 4 output video matrix for a tv studio. The > input signals come from 24 IP to video complex transcoders which > receive their stream from remote cameras spread around the town. The > cost to put 24 frame synchronizers is huge so I figured out if I can > synchronize the video outputs of the IP transducers will allow for > the same effect with less money. The IP transducers are small and I > will mount them in a 2U rack case so they are close together. > I have opened one and the video output IC is a VT1622A digital TV > encoder. So far so good but I cannot find the datasheet for this IC. > I have found the datasheet for the VT1621 and this accepts an > external VSync signal to lock to, so this would be superb. > So my first question is: does anyone has the datasheet for the VT1622 chip? > If not, what do you think of this: If i remove the local > oscillators for the VT1622 chips and feed all of them from one single > oscillator and I reset all the transducers at the same time, is there > a chance to have them in sync from that point on? > > Thank you, > > Mircea Chiricuc > > -- > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist