Personal experiance....bring every unused signal out. If you can do via in pad, then it makes it easier since they will all be on the underneath. Is this an ASIC or an FPGA? Vasile Surducan wrote: Hi, I have a quite large BGA package to route (484 pins). The question is (only for those who already did such PCB designs), which would be the best way to manage the unused pins: deleting the pads or keep them on the PCB ? I presume will be less than 10 layers, but the overal thickness must be quite low (around 0.5-1mm) thx, Vasile -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist --------------------------------- Stay in the know. Pulse on the new Yahoo.com. Check it out. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist