>-----Original Message----- >From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] >Sent: 19 October 2006 19:01 >To: Microcontroller discussion list - Public. >Subject: [PIC] Notice: PIC12F629 has same EEPROM errors as >PIC`16F628 et al > > >Thanks again, Alan Pierce! > >I have been experienced incredible EEPROM unreliability with >the 12F629. I have spent days on it. It appears that chip >revision 0xC of the PIC12F629 (12F675 I will test later) has >the SAME problem as the PIC16F627, PIC16F628, and PIC16F648, >in that the CPU operation is NOT suspended while the WR bit of >EECON1 is true. Bob, Sorry if I haven't quite grasped this, but are you saying that some PICs do suspend the CPU during writes to the EEPROM? I know the CPU is suspended when writing to Flash (on those PIC's that support self writes), but I have never encountered one that suspends when writing to EEPROM. This behaviour would somewhat negate the advantage of using the EEIF interrupt wouldn't it? Regards Mike ======================================================================= This e-mail is intended for the person it is addressed to only. The information contained in it may be confidential and/or protected by law. If you are not the intended recipient of this message, you must not make any use of this information, or copy or show it to any person. Please contact us immediately to tell us that you have received this e-mail, and return the original to us. Any use, forwarding, printing or copying of this message is strictly prohibited. No part of this message can be considered a request for goods or services. ======================================================================= -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist