In SX Microcontrollers, SX/B Compiler and SX-Key Tool, John Kauffman wrote:

[3]I'm thinking through the relative speeds of BASIC STAMP and SX. Some of these thoughts reflect my lack of a degree in Comp Sci, so please correct me when wrong.<?xml:namespace prefix = o ns = "urn:schemas-microsoft-com:office:office" /><o:p></o:p>[/3]

[3] <o:p></o:p>[/3]

[3]The catalog specs are something like:<o:p></o:p>[/3]

[3]STAMP    speed = 20-50 Mhz            <o:p></o:p>[/3]

[3]SX          <SPAN style="mso-spacerun: yes">  speed = up to 74 MHz<o:p></o:p>[/3]

[3] <o:p></o:p>[/3]

[3]This implies the SX is up to four times faster. Are we actually comparing apples to apples?<o:p></o:p>[/3]

[3] <o:p></o:p>[/3]

[3]For the STAMP:<o:p></o:p>[/3]

[3]Obviously each cycle / sec can not be execution of a BASIC command / sec (or even of tokens / sec)<o:p></o:p>[/3]

[3]I assume the stated speeds are for processor cycles / sec and that it takes several cycles for each Token. <o:p></o:p>[/3]

[3]I'm thinking it would take many cycles to make the several assembly commands need to execute one BASIC command. <o:p></o:p>[/3]

[3] <o:p></o:p>[/3]

[3]SX:<o:p></o:p>[/3]

[3]Again, the 75 Mhz must be the number of processor cycles per second<o:p></o:p>[/3]

[3]Again, 2-5 cycles per assembly command<o:p></o:p>[/3]

[3]Again, several assembly commands per SX/B command<o:p></o:p>[/3]

[3]So I am thinking that in the end <SPAN style="mso-spacerun: yes"> the actual number of SX/B commands executed per second is similar to the STAMP<o:p></o:p>[/3]

[3] <o:p></o:p>[/3]

[3]What I am wondering:<o:p></o:p>[/3]

[3]1 - If code is written in PBASIC and SX/B and then executed on a 50 Mhz STAMP and a 75 Mhz SX, is there really much difference in the speed that tasks are completed? Is the ratio of tasks completed any more then the ration of MHz (75/50)?<o:p></o:p>[/3]

[3]2 - Is the main speed difference the fact that you have the option of writing assembly for SX? <o:p></o:p>[/3]

[3]3 - But even if you do write for SX in assembly, can you really cut down on the number of cycles needed to perform a task? <o:p></o:p>[/3]

[3]4 - Could the SX running SX/B actually be slower because its compiler is not optimized and, presumably, the STAMP tokenizer &amp; interpreter are better optimized?<o:p></o:p>[/3]

[3]5 - Am I right to conclude that for users of PBASIC on 50 Mhz STAMPS moving to SX/B on SX at 75 MHz, speed is not a major difference.[/3]

[3]6 - To bring to a practically example, if I am timing very short events (microseconds), can I get significantly better resolution in SX/B on a SX running at 75Mhz then in PBASIC on a 50Mhz stamp? [/3]

<o:p>[3] [/3]</o:p>

[3]Having said that, the different architectures lead to other speed advantages, like the speed of an SX table look-up compared to STAMP getting the data from a table in EEPROM.<o:p></o:p>[/3]

<o:p>[3] [/3]</o:p>

<o:p>[3]- Thanks[/3]</o:p>

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