> > In line with that: I found out that running your system with TWO
> > stop bits (rather than one) allows the UARTS at each end to resynch
> > between characters. This usually allows the system to work fine with
> > a 3-4% error.
> > 
> > --Bob
> 
> Thanks Bob,
> 
> That's an excellent idea. The next question is how does one program
> the PIC UART to send two stop bits - do you have to set it in 9 bit
> mode and make the 9th bit the extra stop bit?

To ansmwer my own question I enabled 9 bit transmission (TX9 = 1) and set the 9th 
data bit (TX9D = 1), which makes it look like 8 bit data with two stop bits.

I tested this by making the transmittting PIC send 2 stop bits, as above, and left the 
receiving PIC configured as previous (8 bits of data 1 stop), and changed the clock 
frequency to determine the point of comms failure.

Firts I increased the clock frequency of the receiving PIC, by increasing OSCTUNE 
value, until comms failed. It fails at about the same point, regardless of sending 1 or 
2 stop bits - when RxD was about 3% faster than TxD.

Next I reduced the clock frequency of the receiving PIC until comms failed. Same 
results as above - more or less no difference in the point at which comms failed 
regardless of sending 1 or 2 stop bits - when RxD was about 3.5% slower than TxD.

Well, it seemed like a good idea and was worth trying, but I can't explain why it 
didn't work as hoped.


-- 
Brent Brown, Electronic Design Solutions
16 English Street, St Andrews,
Hamilton 3200, New Zealand
Ph: +64 7 849 0069
Fax: +64 7 849 0071
Cell: 027 433 4069
eMail:  brent.brown@clear.net.nz


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