Thanks to everyone who replied to this. I'm still playing with the
circuit. The problem I'm having is this:

I'm trying to design a linear bench power supply. Given that the bench
supply can be connected to any circuit (which may have an arbitrarily
high capacitve load), I need it to be stable. In addition, I'd like it
to settle within 100 microseconds after a disturbance (either line or
load).

It seems that it is not possible to achieve stability with very large
capacitive loads AND guarantee fast settling times, even when the
capacitve load is less. (This is the way it seems to me after playing
with it, I have no proof of this yet). This is because you essentially
have to either design for a particular capacitve load (where you get
fast response but there is then some max capacitance you can tolerate
and still be stable) or you have to let the output capacitance
dominate the response (dominant pole compensation), in which case you
are essentially designing for the worst case (highest) output
capacitance and response will be slow.

I guess this isn't too surprising a result, but I was just wondering
why I'd never seen this discussed before. I've seen linear regulators
with a MINIMUM output capacitance spec, but never a maximum output
capacitance spec.

Sean


On 9/11/06, Vasile Surducan <piclist9@gmail.com> wrote:
> 1000uF on a low output impedance emiter circuit ?
> The output capacitor should be low, 10uF up to 100uF..
> You must have resistors on both OA inputs.
>
> Vasile
>
> On 9/11/06, Sean Breheny <shb7@cornell.edu> wrote:
> > Hi all,
> >
> > As you all know, linear regulators essentially consisting of an
> > op-amp, voltage reference, and pass transistor are very common. One
> > drawback is that they cannot sink current, only source it. The first
> > time I tried to design such a regulator, I had an awful time trying to
> > get it to stop oscillating. I eventually discovered that this was
> > because of the nonlinear behavior of the pass transistor at low
> > currents (essentially because if the capacitance on the output got
> > charged to even slightly too high a voltage and there was no load on
> > the output, the op-amp's output would swing all the way to the
> > negative rail untl the cap drifted down a bit in voltage).
> >
> > I've attached a small PDF of a circuit to illustrate this. An LTSpice
> > simulation of this circuit shows it to be unstable when the current
> > being drawn from the output jumps from 10mA to 1A.
> >
> > One way to mitigate this is to put a resistor in the feedback path and
> > a capacitor directly from the op-amp output to its inverting input,
> > thus slowing down the response. However, no matter how large I make
> > this compensation capacitor, large enough output capacitor values will
> > eventually cause instability. The same is true if I put a resistor on
> > the output to draw a minimum load (to reduce the nonlinearity of the
> > pass transistor at low currents).
> >
> > I've often heard of regulators being unstable with too little
> > capacitance on the output, but I've never heard anyone complain of
> > what happens when you have too much capacitance on the output.
> >
> > Is there something I'm missing here?
> >
> > Thanks,
> >
> > Sean
> >
> >
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