On 18 Sep 2006 at 13:47, Harold Hallikainen wrote:
> The datasheet for the 16F687ML in the 20 pin QFN package shows an
> exposed metal pad on the bottom of the chip, but does not, as far as I
> can tell, show what that pad connects to. Is it Vss? Something else?

Yeah, I would like to know too. I came across this with the PIC16F88ML in 28 pin 
QFN. There is no mention of it in anywhere I could find. FWIW the Altium/Protel 
PCB library connects this pad to GND with a whole bunch of vias. Big omission on 
the part of Microchips to not tell us about this pad.

In actual fact in my prototype board design I made my own footprint and managed 
to "overlook" the existence of the exposed metal pad until the chips arrived and I 
had a look at them. My PCB design was ready to roll and I had placed several vias 
under the chip that would have been shorted by this pad. The 11th hour solution 
was to "tent" all the vias (cover with solder mask) and add a solid square on the top 
overlay layer to further prevent the exposed metal pad from touching anything. 
During assembly I put the chips down with double sided tape (another layer of 
insulation, just in case) and soldered by hand. Worked ok, but not something I 
would reccomend for production. It will be a real pain laying out this board again 
with no top side tracks/vias under the PIC. It's hard to imagine the PIC would need 
this pad for heat sinking.

-- 
Brent Brown, Electronic Design Solutions
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Hamilton 3200, New Zealand
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