Vasile Surducan wrote: > On 7/29/06, stef mientki wrote: > >> Dumitru Stama wrote: >> > > snip > > >>> first to be sure there is no hardware connection error. Have you tried >>> with more than one ENC chip ? >>> >> Yes, ... >> ... but I know I'm violating the SPI errata, >> but I've seen no problems there ;-) >> > > Just a thought Stef : > > I know you're using USART for the hardware SPI protocol. > I don't know how well it works that (mostly because USART and SPI are > shared in the same library). Contrary to Gods, the mortal humans are > using MSSP for hardware SPI. > > well Vasile, good idea, but in this case I behaved like a normal human, ... ... and as normal human I make mistakes ;-) I just discovered an interesting phenomena, adding extra capacitors changed the behavior !! - error rate increased - ping response time decreased - error detection / recovery increased So I guess it's a real hardware problem. As all is done on a prototyping module, wiring is not optimal. But I now think power-supply wiring and decoupling is very important for the ENC-chip. I also read the microchip TCP/IP stack sources, and discovered there is error ("single SPI bit error", not described in the errata) that I was not aware of. cheers, Stef > Could be this one be a problem ? (It's not the PIC-ENC communication > problem after all?) > > greetings, > Vasile > -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist