Marty Robertson wrote:
> Hello Everyone,
>
>       I am using a PIC 18F2520's MSSP configured as an I2C master.  It is
> interfacing a DAC that takes a 3 byte packet to write to (Address, Data1,
> Data2).  Generally it is working.  I'm generating arbitrary waveforms with
> no problem...  when it works.  What I mean is that if I power cycle the
> unit, it comes up just fine and begins outputting waveforms to the DAC about
> 90% of the time.
>
>      Looking at it one the scope I see two different distinct error
> states.    SCL would normally generate 9 clocks for each of the 3 bytes (8
> bits data, 1 bit ack) and it is all in a packet surround by start and stop
> conditions.  When it is doing this, all is well.  However, during10% of the
> time I see one of 2 things..     either the clock idles low (should be high)
> and then during the first byte it only puts out a clock on the first bit.
> Then when it gets to the second and third bytes it does the full 9 clocks
> each but returns to a low state.  The other part of the time both lines are
> held high and seemingly nothing happens.
>
>       Whichever state I power up in the unit stays in.  Just before anyone
> asks, I have 1K resistors pulling SCL and SDA up.  I have the same circuit
> hooked up on a dev board and it doesn't have any issues like this.  Does
> anyone have any ideas what might be causing this?
>
> Thank you,
>
> Martin
>   
1K resistors? That seems low, to me. I seem to recall the I2C spec being 
3.3K resistors...

--Bob
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