Peter Todd wrote:
> The 1k resistor goes to 5v, the CdS phtocell to ground.
> I noted the datasheet specifies that signal sources connected to the
> ADC pins should have an impedance of less than 2.2k. My understanding
> is that the voltage divider chain would not qualify for that in low
> light, as the CdS photocell's max resistance in darkness is around
> 300k.

The total impedence into the A/D pin can not exceed the 1Kohm pullup
resistor.  Think about it.  If the photoresistor (it is NOT a photocell)
were completely removed (infinite impedence), you'd still have a source
impedence of 1Kohms into the A/D input.

> One thing I did do is connect an electrolite 100uF capacitor from
> ground to AN0. My reasoning was that the capacitor could reduce the
> impedance by providing a voltage source for the sampling period.

Some capacitance to ground is good to reduce random noise.  However it does
nothing to compensate for low source impedence.  The overall leakage plus
charge current into the A/D pin is still the same.  The capacitor will
merely average out the resulting voltage drop due to the source impedence.


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