Firstly, I use 16F PICs which specify min impedance of 10k, so was not aware 
of this change.  I just checked the datasheet for a 18F452 and it says 2.5K, 
but you can go to 10k with higher acquisition times.  Just an FYI.

I would think that the capacitor would introduce errors, but not sure if that 
matters to your app.

However in your app, with an ideal voltage source having 0 ohms resistance, 
for the purposes of the A/D converter, it should A/D should see an impedance 
of 1K in parallel with the CdS's resistance, making the capacitor 
unnecessary.

Cheers,
-Neil.



On Friday 23 June 2006 22:15, Peter Todd wrote:
> I built a quick circuit to take rough light level readings. It's a
> 18f458 PIC with a CdS photocell/1k resistor voltage divider connected to
> AN0. The 1k resistor goes to 5v, the CdS phtocell to ground.
>
> I noted the datasheet specifies that signal sources connected to the ADC
> pins should have an impedance of less than 2.2k. My understanding is
> that the voltage divider chain would not qualify for that in low light,
> as the CdS photocell's max resistance in darkness is around 300k.
>
> One thing I did do is connect an electrolite 100uF capacitor from ground
> to AN0. My reasoning was that the capacitor could reduce the impedance
> by providing a voltage source for the sampling period. Why the specific
> one? Because there was one already sitting on the breadboard unused...
>
> I'm taking 3.2uS samples about once a second, nothing hard by any means.
> It all seems to work fine and the circuit smoothly goes from 1023 in
> darkness to 53 with a really bright light hitting the CdS. Don't have
> way for formally test it, but the application shouldn't really need it.
>
> I'm just curious if my reasoning was correct. What do you guys think?
>
> --
> pete@petertodd.ca http://www.petertodd.ca
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