Several possibilities.

As someone mentioned, in the anti-pad areas around vias you can see
traces joining the pad on internal layers, and make a judgment from
that.  

As someone also mentioned, you can see a trace entering a via on the top
side, and if there is no trace leaving that via on the bottom, and
assuming its not a power/gnd via, you can judge that there's an internal
routing layer (pair).

Layer count windows are nice, if you can afford them; our incoming
inspection folks have sometimes requested we place them.  They are often
impractical on very compact boards.

On a clean routed board edge, with a magnifier, it is pretty easy to see
each layer of prepreg, but that usually doesn't tell you anything about
the copper layers.

The simplest idea is a 'layer edge view', where a small, electrically
isolated, pad of copper is brought out to the edge of the board on each
layer, such that it is exposed by the routed board edge.  This copper is
usually smeared by the router, but it is cleaned up easily for viewing
by scraping with a knife blade.  On higher layer count boards, and
particularly on controlled impedance boards or boards where the stackup
order is critical for other reasons (shielding, power&gnd coupling), you
place the pads in a 'stairstep' like this edge view:

_______________________________  top
  __                             internal routing 1
    __                           internal routing 2
________                         power 1
__________                       gnd 1
          __                     internal routing 3
            __                   internal routing 4
________________                 power 2
__________________               gnd 2
                  __             internal routing 5 
                    __           internal routing 6 
_______________________________  bottom


With just a glance you can see the number of layers and be certain that
the fabricator stacked them in the correct order.  It also lets you see
if the layer-to-layer distances are correct and you can determine the
copper weights used.  If you also bring out a trace to the edge, using
the same d-code as any impedance controlled traces on the layer, you can
check the trace widths used.

If you use a layer edge view, on your fabrication drawing you should add
a note that the edge exposed copper is not to be removed is the noted
area.  Otherwise your fabrication will probably call you to report the
'error', or else just delete it.


Gary Crowell  CID+
Micron Technology


> -----Original Message-----
> From: piclist-bounces@mit.edu 
> [mailto:piclist-bounces@mit.edu] On Behalf Of james tornes
> Sent: Saturday, June 10, 2006 4:33 AM
> To: piclist@mit.edu
> Subject: [EE:] Visually determining PCB layer count
> 
> A guy giving a presentation to us was looking at various motherboards
> and making assesments like "this is a 4 layer board", "that one is 6
> layers". Can someone actually differentiate with an average eye,
> between boards with 4 layers and 6 layers? Thickness of boards can
> vary a bit even in-between runs so what's the technique here?
> 
> Jim
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