Hello Vasile,

> 1. how long is the bus between PIC and RTL ?

     They are very close (1cm) together.

> 2. the bus is made on dual layer board with routes on one layer and a
> continuous groud plane on the other layer ?

     This board is a double layer, doesn't have a ground plane. Maybe 
this could be a problem.

> This behaviour is identical with a parasitic capacitance on the bus lines.
> It could be solved (if the boards are already manufactured) by trying
> an adapting resistor network near the RTL (possible near the PIC too).
> Usually a 3k3 to 10k network conected from the bus to VCC may help,
> but if the bus is very long or the RTL is supplied wrong will not help
> to much.

     Mmmm, good sugestion. I'll put some 1/8W 10k resistors I have in 
stock bellow the board across the PIC pins (the PIC is PTH, not SMD) and 
see the results.

> You've used some magnetic perls on both VDD and VCC ? In my experience
> these helps on VDD but are making problems on GND.
> Try to change the ground point for your scope probe (ie near the GND
> of the RTL )and measure again. Use a comparative measurement with 1:1
> and 10:1 probe and see if any difference.

      No, there's no magnetics on VDD and VCC. The "rectangles with a 
line" symbol on my schematic is only an SMD pad used to connect signals 
with different classes is Eagle.

 > One more thought, the rising edge could be a tri-state (high Z)
 > behaviour. Does it change if you're making changes in the firmware ?

     It seens that the RTL8019AS have open drain data lines (and the 
internal pull-ups seens to be *very* weak) but can't find this 
information on the datasheet.

     Thank you very much,

     I'll put the resistors and report back.

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