Wouter van Ooijen wrote: >> It turned out that 5 usec delay between Vpp and Vdd rise wasn't enough >> and I need 30 usec to program the device reliable. >> > > That might be a spec problem, but are you sure your Vdd rises that fast? > Vpp rises in less than 1 usec (upto 9V, and then needs about 10 usec to get to 13V) The 1 usec is required by the specs, didn't measure Vdd rise, because couldn't find a relevant spec. > IIRC I use a few ms delay. > Of course that's the trick to be on the safe side, but first I want to find the edges ;-) cheers, Stef -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist