THANKS! I'll investigate these two solutions further. Harold > On Fri, 12 May 2006 15:21:27 -0400, you wrote: > >>On Fri, 2006-05-12 at 10:19 -0700, Harold Hallikainen wrote: >>> I'm looking at an application where I have 10 bit parallel data >>> (representing image pixels) flying by at about 27M words per second. >>> I'd >>> like to capture particular words (under pic control, of course). About >>> the >>> only thing I can think of is a really fast synchronous counter (19 >>> bits) >>> driving a binary comparator driving a latch. To get this speed, I'd >>> probably have to throw it onto an FPGA. Does anyone have any other >>> ideas >>> or comments? Does a single chip frame buffer exist that would capture >>> this >>> and let me look at particular pixels using spi? Other ideas? >> >>At only 27MHz and 10 bits of data a CPLD is a viable solution. >> >>I've used the 9536 CPLD with good success, my logan project uses it (and >>connects it to a PIC): >>http://repatch.dyndns.org:8383/pic_stuff/logan >> >>TTYL > > If you want a single pixel, and don't need single-pixel resolution, run > the PIC synchronously with > the data stream, generate an interrupt on sync, which runs a timer which > generates a second > interrupt at the time of pixel you want. > Failing that, a CPLD should be more than adequate. > > -- > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > -- FCC Rules Updated Daily at http://www.hallikainen.com - Advertise on hallikainen.com - $100/year! -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist