> >>Regarding my previous problem (see "PIC18F452 and NPN transistor to >> control >>PWM flow"), I've decided to go with two AND gates to let pass only one >>signal out of two, and then I'll use an OR gate to merge the two outputs >>into one wire. >> >>My question: are there any chips that encapsulate at least 2 AND gates >> and 1 >>OR gate in only one package? The perfect chip would be one with 2 ANDs, 1 >> OR >>and 1 NOT, but since I already have two traces to control the two AND >> gates, >>the NOT is dispensable. >>Cheers >>Padu A quad nand will do this. An OR gate is a AND gate with all inputs and outputs inverted (put bubbles on them). Draw your circuit as you described (two ANDs driving a OR). Replace the OR with a AND that has bubbles on the inputs and output. "Slide" the input bubbles to the output of the two AND chips. You now have three NANDs. Besides, that, you can use the fourth NAND as an inverter to enable one of the two inputs. So, you can use a 7400 in your favorite logic family. Harold -- FCC Rules Updated Daily at http://www.hallikainen.com - Advertise on hallikainen.com - $100/year! -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist