>Unfortunately, the 16F88 and 12F683 datasheets aren't
>quite so clear on what happens when writing to TMR1.

Which is why he referred to the TIMER1 errata sheet.

>Right now, my "movwf TMR1H" instruction is the 11th
>one in the ISR (counting the instruction at 0x004
>as number 1).

I suspect you should really count that as number 2 - possibly even number 3
depending on just when the 32kHz clocked over the timer, and the interrupt
response latency, as the time will be measured from the 32kHz clock edge,
not the interrupt service start.

Remember that the 32kHz is asynchronous to the 4MHz, and so there could
possibly be a full instruction from the Timer1 counting over to when the
processor checks the interrupt flag and goes into the interrupt routine.

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