On 4/22/06, Vasile Surducan wrote: > On 4/21/06, Alan B. Pearce wrote: > > >That's part of the driver for the FETs. I can post that part of the > > >circuit too, but I think it is unlikely to be part of the problem. > > > > Actually I think that is precisely where your problem is. The bottom FET > > will switch faster than the top one in the totem pole, because you have a > > capacitor on the gate of the top FET, but not the bottom one. Hence when the > > top one is on, bottom off, and you swap states there will be significant > > shoot through current while the top one turns off. > > I'm afraid Allan has right. You have large timing difference in your > FETs N and P driving for half bridges. I didn't look at the > datasheet, but the RC (where R is equivalent resistor in the gate > circuit and C is the equivalent Cis + your capacitors) > must be identical for both FETs. Trying to be accurate indeed, this is not true if you're using one transistor (say the PMOS) from one half bridge just for power on, and the opposite transistor (NMOS) from the other half as PWM (as usually used). Assuming a delay between these two ON commands, with supply ON turned first, nothing should hapent with diodes if the other NMOS and PMOS are indeed turned OFF. So the problem is still the diode, the motor load or the driving algorithm. If you'll forget to mount these diodes, the next probable step will be drain-source short circuits via internal zenner breakdown. > Vasile > > > > > > -- > > http://www.piclist.com PIC/SX FAQ & list archive > > View/change your membership options at > > http://mailman.mit.edu/mailman/listinfo/piclist > > > -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist