Jan-Erik Soderholm wrote:
> CODEPAGE   NAME=page0      START=0x5      END=0x7FF

This is a really bad idea.  This memory region should start at 0, not 5.
Yes I know standard Microchip linker files do this, but that doesn't make it
a good idea any more than all the other bad examples they provide.

However, this has nothing to do with the current discussion.

> Now, let's say you have 2 sections in one of your source files that
> should be forced to "page0" and called "MYSECT1" and "MYSECT2"
>
> I think that one can just add the following the the LKR file :
>
> SECTION    NAME=PROG0      ROM=page0       // ROM code space
> SECTION    NAME=PROG1      ROM=page1       // ROM code space
> SECTION    NAME=MYSECT1    ROM=page0       // ROM code space
> SECTION    NAME=MYSECT2    ROM=page0       // ROM code space
>
> That will force the linker to put them both on "page0".

Yes, that's exactly right.

> That might very well
> mean that the order (as seen in the source files) isn't preserved.

Right.  The order in the source files is essentially irrelevant.  The linker
placement algorithm is clearly described in the manual.

> I can't say I'm 100% about what I've tried to describe
> above, but... :-)

Everything you said looked right to me.


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