In message <6.1.2.0.2.20060405112746.033215c8@10.2.0.3> Sergio Alejandro Gonzalez wrote: > I've always wanted to build a Mixed signal DSO. No chance we could add 4 > channel analog signals. I could work in the 4 layers PCB, power supply and > analog adquisition. Analog devices parts are going into the 1GS per second > and more (with carefull PCB desing). > > What you think..... The big problem is the CPLD I'm using won't run at 1GHz. The Xilinx Virtex chips will go to 500MHz, but they're seriously expensive. We're talking deposit-on-a-small-car expensive. I'm not sure about the Spartan series, but I doubt they're much faster. Bootloading an FPGA wouldn't be difficult - you could add a flash chip and a small (32 macrocell) CPLD to the board to do that. It just adds to the complexity. Heck, even adding two extra analogue channels is just a case of adding another RAM and some logic to control triggering and acquisition. Not difficult at all. I don't know how you'd go about going faster than 500MHz without going for a full-custom ASIC. Thanks. -- Phil. | Kitsune: Acorn RiscPC SA202 64M+6G ViewFinder philpem@dsl.pipex.com | Cheetah: Athlon64 3200+ A8VDeluxeV2 512M+100G http://www.philpem.me.uk/ | Tiger: Toshiba SatPro4600 Celeron700 256M+40G -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist