Hi Brian. > So the internal clock is not incrementing the timer at xtal x 4. TMR1 fastest clock is Xtal freq / 4. The same applies for program counter. > I'm trying to generate pulses in bursts of 1-255 spaced evenly over ~900us. Why not to distribute them evenly over 1000 us ? :) And communicate with the main chip in "idle" intervals between changing the pic outputs generating pulses. You might try to implement DDS or "phase" counters ( you add some constant to "phase" counter and change related pic output when you have a carry out of related "phase" counter ) Take a look at Scott's research, I believe you will find it usefull to start. http://www.dattalo.com/technical/software/pic/pwm.txt http://www.dattalo.com/technical/software/pic/pwm256.txt http://www.dattalo.com/technical/software/pic/pwm8.asm http://www.piclist.com also has lots of good code snippets if you search. If you do "invent" cool trick or code snippet by youself do not hesitate to share it later with Piclisters :) WBR Dmitry. > The bursts must not be over 100us but can range from say 850 to 950us and must be every 1ms. > When the 628 gets its new data it starts tmr1 and every time tmr1 rolls over it decrements the number of loops through the timer in each burst by one, so eventually it will have sent out that number of pulses at the tmr1 load spacing. Then it says via portb to a 18f452 that it wants the next burst data. Hopefully this transfer takes place in the time between the end of the 850-950 burst and 1ms. > Every 1ms new pulse spacing is available from a lookup table in the 18f with the number of pulses. > This is supposed to control a stepper motor which needs an accurate number of pulses evenly spaced. > The count/1ms comes from an encoder read by a HCTL2016 every 1ms. > > Many thanks, > > Brian Harris -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist