On Mar 1, 2006, at 10:49 PM, Wouter van Ooijen wrote:

> I don't see how your code handles an as-yet-undifined chip

TI has some interesting timer-based schemes for implementing
uarts an the like on the low-end MSP430 micros, which are pretty
C-oriented.  Seems like it's pretty easy if you can handle
clock interrupts at a frequency significantly faster than your
even rate.  That wasn't common in the past, but it's becoming
so.  You end up arriving at "my RTOS features can do that with 100us
resolution, do you really want a whole new language primitive
to handle the few cases when you need faster than that?"

Are there any good HLLs for supporting virtual peripheral development
on the scenix CPUs?  That would have been a natural place for this
sort of thing to have been refined...

BillW
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