Thanks Mr Lathrop for your suggestions on my subject. I looked at some to
your asm codes but i have to admit that the routines on MCC18 directory
seems more convenient to adopt. Though i have some problems with pic18 asm,
i will try my best to benefit the C18's powerfull open-source library. It
also includes very neat and well-commented  peripheral libraries which i
will try to port them to PICC in future.  I had written a similar post to
the Hi-tech's forum for general-purpose library development request but they
didnt interested much. What's wrong with this kind of general C coded
peripheral library?


2006/2/24, Olin Lathrop <olin_piclist@embedinc.com>:
>
> Maarten Hofman wrote:
> >> /* Delay of exactly 2 Tcy */
> >> #define delay_2tcy() asm("nop"); asm("nop")
> >
> > As Chen Xiao Fan indicated, this could be better done using a "goto
> > $+1" operation: it would take only one word instead of two.
>
> Even better is to use a macro that you simply tell the number of cycles to
> waste and it figures out when to use GOTO $+1, BRA $+2, and NOP.  That's
> what my WAITCY macro in STD.INS.ASPIC at http://www.embedinc.com/pic does.
>
> However in most cases of inserting NOPs, you are really trying to do
> timing.
> Just iserting a fixed number of instruction cycles is a bad idea since
> that
> makes your source code implicitly dependent on the processor clock speed.
> WAITCY should only be used when you want to wait a specific number of
> *instructions*, which is rare.
>
> An even better answer is to specify the amount of *time* to waste.  Let
> the
> assembler calculate how many instruction cycles that is, then calclulate
> the
> least number of instructions to take that many cycles.  But there's
> another
> wrinkle.  Often you need two instructions to be a fixed minimum time
> apart,
> but you have other things you can do during those instructions although
> they
> don't guarantee taking that minimum amount of time.  So you want a minimum
> guaranteed delay in time, but are going to spend some of that with a fixed
> number of instruction cycles.  Therefore what you really need is a way of
> saying, for example, "Take 2uS, but I've already used 5 instruction cycles
> out of that 2uS.".  This shows the part you know about and can control in
> the source code without any implicit reliance on the processor clock
> speed.
>
> This is exactly what my WAITNS and WAITUS macros in STD.INS.ASPIC do.
>
> > Note that at some point it will become better making a small loop
> > using decfsz and goto $-1.
>
> As long as the side effect on the additional state and the status flags
> are
> clearly documented.
>
>
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