> For 18F4550, pin 38 is either RD0 (for 44pin TQFP used in PICDEM FS 
> USB) or RB5/PGM for 40 pin DIP. So you are using the 40pin DIP
> package.
> 
> Both RB4 and RB5 are defined as input in io_cfg.h. But the definitions
> are not used in the boot firmware. I do not know what happened to your
> board that you can not enter the bootload mode when connecting
> RB5 to high. Have you checked your board to see if all connections
> are correct.
> 
> #define mInitAllSwitches()  TRISBbits.TRISB4=1;TRISBbits.TRISB5=1;
> #define mInitSwitch2()      TRISBbits.TRISB4=1;
> #define mInitSwitch3()      TRISBbits.TRISB5=1;
> #define sw2                 PORTBbits.RB4
> #define sw3                 PORTBbits.RB5
> 
> The bootloader entry is using RB4 (S2). The firmware uses the
> fact that RB4 is already being defined as input after reset.
> I will generally not use this but redefine it again in the
> code.

I may then have a problem on my board, however I have this question:
As you said RB4 and RB5 are defined as inputs, but are not trist_ed
into this mode because they are using the fact that ALL pins are input
anyway after reset, right? If so, it seems very strange that it is pin RB5
which seems to be sensitive to no pullup and the other pins (all the 
other ports, about 32) are not having this problem. Try not pulling up
RB5, leave it unconneted, see if you get this problem, then if you do,
can you explain why RB5 is sensitive, rather than any other port pin
of which there are many.

Also, as you say yourself, microchip left all unused pins in input stage,
so it seems this is not the same as per the advice some people here
seem to be giving - to configure unused pins to output.

If I am repeating myself I am sorry, I just want to make sure that
I am being understood. Thanks.

> 
> I have just made a partial PICDEM FS USB board (no RS232, no
> temperature sensor, only bus powered). I connected S2/S3 as 
> per the schematics in the user guide and I do not have problem 
> entering the bootload mode. I think you should have pull-up 
> resistors for S2/S3.
> 
> Regards,
> Xiaofan 
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