In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Coriolis wrote:

The new parallax documents do a better job explaining them: [url=http://www.parallax.com/dl/docs/prod/datast/SX48BD-Data-v1.01.pdf#page=32]http://www.parallax.com/dl/docs/prod/datast/SX48BD-Data-v1.01.pdf#page=32[/url]
 

the Capture and Compare are actually two different functions in the same mode and are abbreviated for Input Capture and Output Compare. 

 

The input compare function upon detecting a transition on the input compare pin for that timer, copies the current value of the free running timer into a register, you can think of this as a timestamp. This is much like the function of the Port B interrupts but with the timer value thrown in. Obtaining two time stamps you can determine the time between two different events (if the transistion edge the input compare activates on is the same) or the duration of a single event (if the transition edge the input compare activates on is changed). 

 

The output compare mode is much like the PWM mode except the timer does not reset when the value R2 is reached. This is equivilent to a fixed period PWM (base time is fixed according to 2[sup]16[/sup] timer cycles). I am a little unclear of the real world behavior of output compare mode for the SX, whether the contents of R2 dictate the second toggling of the output pin, or if the timer overflow causes the toggling of the bit (or if you have to manually toggle the bit during a timer overflow interrupt). But this behaviour could be easily verified by using a close value of R1 and R2 and using a large prescaler for the timer and an LED connected to the output compare pin for the timer.

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