Thank you, Alan,

> >It works like the NRZ (non return to zero): Logical 0
>>is a voltage change and 1 is no change.
>>Time for 1 bit is 104 microseconds.
>>Can anybody recommend any program for a similar bus
>>from which I can start and modify it?
>
> When RCA first brought out the CD4046 PLL chip, they had an application 
> note
> that used the CD4046 to recover the clock from the data stream. While this
> is a hardware solution, it would give you an idea of what you need to do 
> in
> your program. At 104 uS per bit it should be do-able. Had a browse around,
> but cannot find an electronic copy on the web. Looks like everyone is
> obsoleteing it.

thats what I roughly thought. Let a timer (104 plus x uS) start with either 
edge, and if there hasnt been an edge during that time, the timer has to 
start over.
if there is an edge, restart the timer.
each edge and each timer overflow will save the bit (is there something like 
a shiftregister in these PICs?)

>
>>Also, I have no feeling for the size of such program, so
>>would anyone dare to propose which PIC I should start with?
>
> Well I would suggest one of the 18F family, as these have a reasonable
> amount of RAM and heaps of Flash. I would have thought an 18F252 or 
> 18F452,
> or one of the later versions of these two, as they are considered "mature
> products". They also have an internal clock rate multiplier to get extra
> speed out of the chip if needed.

Thanks you for the recommendation. Its very helpful to know something to 
start with.
Lembit


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