;******************************************************************************
;       Filename:       F452Conf.inc                 Part of 
MCA.asm          *
;       Date:           
12/08/2005                                            *
;                                                                             
*
;    Author:  Thomas C. J. 
Sefranek                                           *
;    Company: NeuroPhysics 
Corp                                               *
;             900 Mount Laurel 
Circle                                          *
;             Shirley, Massachussetts  
01464                                   *
;                                                                          
    *
;   IMPORTANT: For the PIC18 devices, the __CONFIG directive has 
been         *
;              superseded by the CONFIG 
directive.                            *
;******************************************************************************
;   Oscillator Selection:
;     OSC = LP             LP
;     OSC = XT             XT
;     OSC = HS             HS
;     OSC = RC             RC
;     OSC = EC             EC-OSC2 as Clock Out
;     OSC = ECIO           EC-OSC2 as RA6
    CONFIG     OSC = HSPLL    ;      HS-PLL Enabled
;     OSC = RCIO           RC-OSC2 as RA6
;
;   Osc. Switch Enable:
;     OSCS = ON            Enabled
    CONFIG     OSCS = OFF      ;     Disabled
;
;   Power-up Timer:
    CONFIG     PWRT = ON     ;      Enabled
;     PWRT = OFF           Disabled
;
;   Brown-out Reset:
;     BOR = OFF            Disabled
    CONFIG     BOR = ON      ;       Enabled
;
;   Brown-out Voltage:
;     BORV = 45            4.5V
    CONFIG     BORV = 42    ;        4.2V
;     BORV = 27            2.7V
;     BORV = 25            2.5V
;
;   Watchdog Timer:
    CONFIG     WDT = OFF       ;     Disabled
;     WDT = ON             Enabled
;
;   Watchdog Postscaler:
;     WDTPS = 1            1:1
;     WDTPS = 2            1:2
;     WDTPS = 4            1:4
;     WDTPS = 8            1:8
;     WDTPS = 16           1:16
;     WDTPS = 32           1:32
;     WDTPS = 64           1:64
    CONFIG      WDTPS = 128     ;     1:128
;
;   CCP2 MUX:
;     CCP2MUX = OFF        Disable (RB3)
    CONFIG      CCP2MUX = ON     ;    Enable (RC1)
;
;   Stack Overflow Reset:
;     STVR = OFF           Disabled
    CONFIG      STVR = ON     ;       Enabled
;
;   Low Voltage ICSP:
    CONFIG      LVP = OFF      ;      Disabled
;     LVP = ON             Enabled
;
;   Background Debugger Enable:
;     DEBUG = ON           Enabled
    CONFIG      DEBUG = OFF    ;      Disabled
;
;   Code Protection Block 0:
;     CP0 = ON             Enabled
    CONFIG      CP0 = OFF     ;       Disabled
;
;   Code Protection Block 1:
;     CP1 = ON             Enabled
    CONFIG      CP1 = OFF     ;       Disabled
;
;   Code Protection Block 2:
;     CP2 = ON             Enabled
    CONFIG      CP2 = OFF      ;      Disabled
;
;   Code Protection Block 3:
;     CP3 = ON             Enabled
    CONFIG      CP3 = OFF      ;      Disabled
;
;   Boot Block Code Protection:
;      CPB = ON       ;      Enabled
    CONFIG    CPB = OFF      ;      Disabled
;
;   Data EEPROM Code Protection:
;     CPD = ON             Enabled
    CONFIG      CPD = OFF      ;      Disabled
;
;   Write Protection Block 0:
;     WRT0 = ON            Enabled
    CONFIG      WRT0 = OFF      ;     Disabled
;
;   Write Protection Block 1:
;     WRT1 = ON            Enabled
    CONFIG      WRT1 = OFF       ;    Disabled
;
;   Write Protection Block 2:
;     WRT2 = ON            Enabled
    CONFIG      WRT2 = OFF        ;   Disabled
;
;   Write Protection Block 3:
;     WRT3 = ON            Enabled
    CONFIG      WRT3 = OFF       ;    Disabled
;
;   Boot Block Write Protection:
    CONFIG      WRTB = ON        ;    Enabled
;    CONFIG      WRTB = OFF       ;    Disabled
;
;   Configuration Register Write Protection:
;     WRTC = ON            Enabled
    CONFIG      WRTC = OFF       ;    Disabled
;
;   Data EEPROM Write Protection:
;     WRTD = ON            Enabled
    CONFIG      WRTD = OFF       ;    Disabled
;
;   Table Read Protection Block 0:
;     EBTR0 = ON           Enabled
    CONFIG      EBTR0 = OFF      ;    Disabled
;
;   Table Read Protection Block 1:
;     EBTR1 = ON           Enabled
    CONFIG      EBTR1 = OFF      ;    Disabled
;
;   Table Read Protection Block 2:
;     EBTR2 = ON           Enabled
    CONFIG      EBTR2 = OFF        ;  Disabled
;
;   Table Read Protection Block 3:
;     EBTR3 = ON           Enabled
    CONFIG      EBTR3 = OFF      ;    Disabled
;
;   Boot Block Table Read Protection:
;     EBTRB = ON           Enabled
    CONFIG      EBTRB = OFF      ;    Disabled
;

-- 
  *
  |  __O    Thomas C. Sefranek   WA1RHP@ARRL.net
  |_-\<,_   Amateur Radio Operator: WA1RHP  
  (*)/ (*)  Bicycle mobile on 145.41, 448.625 MHz

http://hamradio.cmcorp.com/inventory/Inventory.html
http://www.harvardrepeater.org


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