On Mon, Jan 30, 2006 at 10:30:52PM +0100, Wouter van Ooijen wrote:
> >> how would you preserve the timing?
> > 
> > 1200N71
> > 
> That's fine for the single output line, but that implies some (limited)
> 'intelligence' on the other side of the serial port. IMHO that spoils
> the idea.

Wouter, I think you missed the idea. Let me repeat. Take a look at my TBS555
schematic for reference:

http://www.finitesite.com/d3jsys/tbs555

You can ignore the RX stuff in the top right corner of the page. I'm still
trying to work that through. It's also unnecessary for a black hole TX out
version of this circuit.

The beginning of the start bit triggers both 555 circuits. The left 555 is
tuned to about a 1/2 character time. The right one is tuned towards the end
of the character time bleeding into the stop bit. The output of the right 555
drives the emitter of the transistor driving the 555 triggers to 5V turning
the transistor off. So both 555s end up being edge triggered and will time
out at the same time no matter how TX wiggles after the trigger.

So in the end only the RC timing is the "intelligence" on the other side of
the serial port. The left 555 will always time out in the center of the
character transmitted and will clock the value of TX at that time. So a
character with leading zeros will clock a zero and a character with leading
ones will clock a one in the PIC.

Simple. And only rough tuning on the 1/2 and full character time are required

I tested this circuit at 9600 BPS. It works fine.

It's the RX side I have not yet figured out. The objective is to create
a structured character that reflects the bit transmitted by TX or by the
PIC through the PIC data line. The parameters are that it needs to have a
valid start bit, can only be a character width in size, and accurately
reflect the current TX/PD bit. It's still a work in progress.

But at the end of the day, the only "intelligence" is the RC timing of the
two 555s.

BAJ
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