In message <43DD4084.10502@cotse.net> Bob Axtell wrote: > The problem is that actually several buffers are needed, as well as > lotsa code space > making it ALMOST impossible on PIC16, unless you use an external SPI > EEROM Memory > arrayed as 32Kx8, and have plenty of buffer space. Yeah, I just ran the numbers again. I came up with a worst-case figure of 512 bytes - there's no way in hell a 16F917 is going to handle *that*. An 18LF6490 could probably do it, but those things are a real pain in the neck to solder... The big problem is all the big-name message-digest algorithms need vast gobs of RAM. All the ones designed for 8-bit architectures and low-memory systems seem to be trade secrets or completely nonexistent. > Are you sure you need this much security? Couldn't a scrambling > algorithm work OK, as > long as you have good security for the algorithm itself? What I'm after is a decent hash algorithm or a block cipher that can be "wired" as a hash. I'm throwing together a secure ID tag (just for grins). You basically take the current time (in UNIX timestamp format, but 64 bits long) and an encryption key, then turn that into a key that's displayed on an LCD. That key gets entered instead of (or in addition to) a password, and if all goes well the user gets logged in. At the moment, I'm toying with the idea of using the TEA algorithm, which is implementable in about 40 bytes of RAM. Plus I wrote a nice little PIC16 implementation, which I happen to know works fine :) Why? It seemed like a fun project, and I've got a few calculator LCDs to repurpose. Hint for folks in the UK: Tesco "Value" brand pocket calculators (the little black ones that sell for 74p) use a very hackable LCD with an elastomer connector (Zebra Strip). All you need to rig up is a mounting frame to compress the elastomer strip. What is REALLY annoying is that the Mchip datasheet doesn't have any figures for IntRC startup time. I'm wanting to put the CPU to sleep until the clock ticks over, then do the generation cycle once a minute. Problem is, if the osc doesn't start up within a few microseconds, the PIC is going to miss the low edge of the TMR1 pulse, which will cause TIMER1 to lag by 15us (see the TIMER1 Module Errata). Gaaah! Why is there no spec for "Time from interrupt to SLEEP mode exit"?! (Or maybe there is and I haven't seen it...) Thanks. -- Phil. | Kitsune: Acorn RiscPC SA220 64M+6G ViewFinder philpem@dsl.pipex.com | Cheetah: Athlon64 3200+ A8VDeluxeV2 512M+100G http://www.philpem.me.uk/ | Tiger: Toshiba SatPro4600 Celeron700 256M+40G ... Tis but a flesh wound... -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist