In SX Microcontrollers, SX/B Compiler and SX-Key Tool, g_daubach wrote:

[quote="Paul Baker"]Guether, have you investigated why 4 layer exhibits better EMI properties than 2 layer? Is it because flood fills frequently used for power and ground planes on 2 layer boards create resonant cavities for EMI to be amplified, or the board material dampens EMI because the power planes are internal? Not important, just curious.[/quote]

Paul,

don't take this for granted (you can nothing take for granted concerning EMI :-) ) but I think the four-layer concept allows for much more parallel flood filled areas on the two inner layers than flood filling the top and bottom sides of a two-layer board. This is because these areas are cut by the various signal traces. Usually, I connect the flood-filled areas un the top and bottom layers to ground. When there are larger "islands" caused by surrounding traces, I try to place one or moe vias to connect the topy and bottom flood-fill areas if this brings the ground sinal to the isolated area.

I was thinking of a two-layer design with all the flood-filled areas on one side connedted to ground, and the areas on the other side to positive supply. These also would make a bypass capacitor. Unfortunately, in most cases, there remain many isolated areas that you now can't connect to a signal using vias. With a four-layer design, this is always possible. If we assume the flood-filled areas and the inner supplay layes being connected like this:

Vcc  Layer 1
Vss  Layer 2
Vcc  Layer 3
Vss  Layer 4

You can connect any isolated top area using vias from top to layer 3, and isolated bottom areas using vias from layer 2 to bottom.

It also might be an idea to place the signal traces on the inner two layers, and place the Vcc and Vss planes on the top and bottom layers. This way, they would shield the signal traces that are then located on the two inner layers. On the other hand, due to the larger distance between top and bottom, the resulting bypass capacity might be smaller. This now also depends on the size of the flood-filled areas on the inner layers. I never tried this arrangement of layers so far, so I can't tell if it has an advantage over the other layout.

Using supply layers, no matter at which position also causes capacities between the signal straces and the supply layers that might cause trouble with very fast switching signals, where "fast" is relative. IMO, the signals around an SX, even when clocked ato 100 MHz are still "relatively slow", so these capacities can be ignored. On the other hand, when you have a look at a modern PC main board, you will find traces shaped like meanders or coils. All this is necessary to adjust signal propagation times on these traces.

There is no simple rule of thumb here - it is a wide field for excperimenting.

As long as you do designs for private and hobby use, EMI should be a concern as far as possible but it is of less importance compared to applications that must pass the EMI approval procedures.

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