The op amp non-inverting input is coupled to the output of an LM1972 digital attenuator via a 1uf electrolytic. This part of the circuit is identical to one that has been in use flawlessly for years. The inverting input is tied directly to the output, which feeds a 5532 summing amp via a 0.1uF ceramic cap. This part is different from the old circuit in that the now-problematic op amp also fed a 5532 buffer amp with a Z in of 2.7k via a 10uF electrolytic. I realize my LF cut-off through the summing amp is higher now due to the smaller coupling cap, but this is desirable in this application. All traces are short. The input of the digital pot (also via a 1uF electrolytic) does go off-board to another board within the unit, but this was also the case in the working legacy system. Would an input current limiting resistor really make a difference on a JFET input op-amp with its characteristically high Z-in? Would this unity-gain buffer be more stable if there was a nonzero resistance in the feedback loop? I'll try to increase only the negative rail as you've suggested and see what happens. The time it takes for the fault to appear (approx 22 hours) is slowing down the troubleshooting process, but I have several units to play with. RR ----- Original Message ----- From: "Dwayne Reid" To: "Microcontroller discussion list - Public." Sent: Wednesday, January 25, 2006 11:17 AM Subject: Re: [EE]: op amp latch-up problem > At 10:44 PM 1/24/2006, Rob Robson wrote: >>I have an LM1972 uPOT on +/-5V rails feeding a TL072 on +/-12V rails >>wired as a unity gain buffer as per the LM1972 datasheet. I've used >>this circuit for years with a linear power supply without any >>problems, but when the circuit was ported to a system with a >>(noisier) switching power supply, the TL072 would latch up after >>only a few hours of operation . First problem: I had put the TL072 >>on +/-5V rails without consulting its spec sheet (too low, as it >>turns out), so I substituted the more forgiving LF353. The latch-up >>condition would still occur after several hours of operation. > > Which latch-up condition do you refer to? There are two: SCR type > latch-up where the chip draws significant current *or* > phase-inversion latch-up where the output of an op-amp swings hard to > one rail because one or both inputs went out of the common-mode voltage > range. > > I'm assuming a phase-inversion type latch-up but it would be useful > to have that confirmed. > > Like Bob, I've been using the TL07x family for a couple of decades, > in at least a hundred different products (probably way more than 100) > without incident. > > The TL07x family does include the positive supply rail within the > common-mode voltage range. Can you try adding an external negative > supply such that the negative rail is at least 3V lower than the > lowest expected signal? I'd suggest starting off at -8V or > -9V. Leave the + supply rail at 5V. Then let the thing run and see > if the problem occurs. > > Are the TL072 inputs exposed directly to the outside world? What > signal range are you expecting? > > dwayne > > -- > Dwayne Reid > Trinity Electronics Systems Ltd Edmonton, AB, CANADA > (780) 489-3199 voice (780) 487-6397 fax > > Celebrating 21 years of Engineering Innovation (1984 - 2005) > .-. .-. .-. .-. .-. .-. .-. .-. .-. .- > `-' `-' `-' `-' `-' `-' `-' `-' `-' > Do NOT send unsolicited commercial email to this email address. > This message neither grants consent to receive unsolicited > commercial email nor is intended to solicit commercial email. > > -- > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist