> I still don't understand (and didn't see anything mentioned) how
> writing more cells affects the failure probability: if the failure
> probability goes up with every write to a cell, writing more cells
> could also increase the failure probability (for the cells you don't
> really change, the ones you just write as part of the block write).

I see what you mean. But although you're writing to more cells,
it's at a lower voltage. Maybe the two cancel out ? Don't know,
might have to read around some more

The Predictive Software would be useful

Home Page/Development Tools/Software/Total Endurance

Examples are given in AN562 (70kB)

http://ww1.microchip.com/downloads/en/AppNotes/00562.pdf

"Microchip has done extensive predictive laboratory studies on
Microchip 2- and 3-wire Serial EEPROMs. These studies led
to the concept of using the computer to predict the theoretical
wear out of the floating gate and ultimately to project the point
in time of a product's life cycle when the first non-volatile
memory bit or periphery failure should occur"

Total Endurance Quick Start Guide (235kB)

http://ww1.microchip.com/downloads/en/DeviceDoc/TotEnd_QS_51342A.pdf

s/w (12MB)

http://ww1.microchip.com/downloads/en/DeviceDoc/Total%20Endurance%20v401%20I
nstall.exe

Presumably for internal EEPROM, you'd use 1 byte per cycle

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