In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Rsadeika wrote:

Now, I think I am getting pretty close to where I want to be on this. At first glance the RTCC business being at 256 cycles does not give you much room to play with, so that is why they gave you the pre-scaler. I think I got that one figured out, if you want to reduce the activation of the interrupt, you use a pre-scaler. The default is 256 cycles, when you use a pre-scaller of 1:2 = (2 * 256), 1:256 = (256 * 256), so, at the top end you have 65,536 cycles until the next interrupt occurs, generally spaeking. 

The following statement is what I am having some trouble with. "Normally it is a requirement for the user program to process every interrupt without missing any. To ensure this, the longest path through the interrupt routine must take less time than the shortest possible delay between interrupts." Anybody care to elaborate on this, which leads into something that was mentioned about creating a coded interrupt that with the incorect cycle times can cause a situation where the program never leaves the interrupt. That could create a debug nightmare.

Anybody have a rule of thumb about how to pick a spicific interrupt rate, or do you just sit down and work out the numbers for each condition.

Thanks

Ray

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