> 8x8 matrix. This would likely be the least hardware intensive method. > The downside is that handling all the scanning and debouncing states > might be a bit intensive. I suppose I could simplify it by just > treating it like 4 independant 4x4 matricies. I've never done a matrix > this large, it's a bit daunting. > > Massive shift register. It would be easy to shift in 64 bits. > Debouncing might be an issue though. At the very least this might > simplify some of the board layout. Undecided on this one. For ease of programming a SR chain seems top for me. You might want to look at SRs that have a delayed output, to avoid clock skew problems. You will need a pull-up for each switch. But an 8x8 matrix is only a little bit more work. But you will need a diode on each switch to be able to detect multiple key presses correctly. For debouncing: just take care that you scan slower than the longest devounce time (50ms is a good upper limit if the switches do not document this). So with a 20 Hz scan frequency you can forget about bouncing. Wouter van Ooijen -- ------------------------------------------- Van Ooijen Technische Informatica: www.voti.nl consultancy, development, PICmicro products docent Hogeschool van Utrecht: www.voti.nl/hvu -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist