Lee Jones wrote: > It is obvious ... once you know about it. PIC 18F2220/2320/4220/4320 > data sheet, DS39599C, section 6.6 "Flash Program Operation During > Code Protection" has 1 sentence refering you to section 23.0 (with > a note to see 23.5 "Program Verification And Code Protection")." > > No where in section 23.5 "Program Verification And Code Protection" > does it mention the 4.5V to 5.5V requirement to erase the chip. > > You have to read to section 23.9 "Low Voltage ICSP Programming"! > The last sentence of that section finally mentions the restriction. > Tucked into the regular text, with no highlighting or emphasis, are > two sentences addressing this. And the important one, stating the > PIC needs 4.5V to 5.5V to do a block erase, is almost misleading > because it qualifies it with "when using low voltage programming". > In fact, bulk erase ALWAYS needs 4.5V to 5.5V, no matter which > programming mode you are using. I don't remember if I've looked at that specific programming spec, but for the ones I have seen they show the min/max Vdd levels for bulk erase in the electrical specifications table near the end, which seems like a reasonable place for voltage level issues. Someone designing a circuit for ICSP might not read most of the algorithm descriptions, but would certainly look thru the electrical specifications. ****************************************************************** Embed Inc, Littleton Massachusetts, (978) 742-9014. #1 PIC consultant in 2004 program year. http://www.embedinc.com/products -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist