In SX Microcontrollers, SX/B Compiler and SX-Key Tool, cbmeeks wrote:

[quote="James Newton"]I assume you are using:

 [url=http://www.piclist.com/cgi-bin/delay.exe?Delay=46&Type=cycles&Regs=d1+d2+d3+d4&clock=80&name=Delay&CPU=SX ]http://www.piclist.com/cgi-bin/delay.exe?Delay=46&Type=cycles&Regs=d1+d2+d3+d4&clock=80&name=Delay&CPU=SX [/url]
 



[code]
; Delay = 46 instruction cycles
; Clock frequency = 80 MHz

; Actual delay = 5.75e-007 seconds = 46 cycles
; Error = 0 %

d1 DS 1

;46 cycles
    mov w, #$0C
    mov d1, w
Delay_0:
    decsz d1
    jmp Delay_0
 
[/code]
The mov's take a cycle each. jmp takes 3 cycles in turbo mode. decsz takes 1 cycle if the condition is false and 2 if it is true. My old SX-Key manual actually says 3, but the current datasheet says 2 and that makes a lot more sense.
 

So, the mov's take 2 cycles. The first 11 times through the loop, decsz takes 1 and jmp takes 3 so 4 times 11 = 44 for a total of 46 so far. On the 12th cycle, the result is zero and decsz takes 2 cycles to skip out for a total of 48 cycles. 

 

I believe you are correct, the delay generator doesn't take into account the final 2 cycles. I'll let the author know.[/quote]

Well, I knew I wasn't crazy...lol

Every loop I checked had two extra clocks.  I spent a lot of time trying to figure out why my display didn't look correctly.  My fault for assuming.  :-)

Günther's, SXSim saved the day.

Oh, Günther, I haven't been able to count in the last couple of days due to a heavy work load but I should be back on it this week...and it looks like James has verified this too.

Thanks guys

cbmeeks

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