Hello there

Currently I'm using the capture module with a 100 kHz TMR1 clock, but
I need to bump that clock to the megahertz range for increased
precision and for that I need a 32 bit timer.

The obvious way is to set a handler for the TMR1 interrupt and
increment a 16 bit counter for the most significant bits. However
doubts arise as to the accuracy of that method.

How can I be certain that when the TMR1 and CCP interrupts happen
"close enough" that the correct value will be captured? IOW, that if
the TMR1 interrupt happens first the counter is incremented before the
value is captured, and vice-versa? Since PICs only really have one
interrupt it makes things difficult if the second interrupt occurs
between the first and reaching the handling code...

I've come up with the following not-so-errorproof interrupt handler
logic... I'd appreciate very much if any of you could comment on that.
Perhaps someone here has done this before?

if (TMR1F) {
   if (CCP1F && CCP1R > 32767) {
      // consider CCP1 interrupted first before timer overflowed,
      // copy values, clear CCP1F and proceed
   } else {
      // proceed as normal
   }
   counter++;
}

if (CCP1F) {
   // proceed as normal
   // any special handling needed was done in the above block
}


Thanks in advance...

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