Hi to all engineers,

as soon as I add parity checking in main PS2 routine the clock
timing gets shifted that is because of adding more clock cycle.
My question is what is the best way of doing parity checking without
effecting the clock ?
should parity checking be done outside the routine ?
any suggestion will appreciate.

here is the code I came up so far

void ps2_out(BYTE data)
{
      BYTE i;
      int parity = 1;           // 1=ODD, 0=EVEN         <<< 1st time
      int data_copy;     //
      data_copy = data;         // copy of data
      output_low(PS2_CLK_OUT);  // <<< start bit
      output_low(PS2_DATA_OUT); // <<<
       delay_us(35);
      data_copy &= 0x7f;            // <<< Parity "trim to 7 bit ASCII"
      parity ^= (data_copy & 1);    // <<< Parity "2nd time"
      for(i=0; i<8; i++)
      {
      parity ^= ((data_copy >> i) & 1);  // <<< Parity "3rd time"
      output_bit(PS2_DATA_OUT, shift_left(&data,1,0)); //  shift data 
LSB first
      output_high(PS2_CLK_OUT); // data can be changed on clock high
      delay_us(35);
      output_low(PS2_CLK_OUT); // data is valid when clock is low
      delay_us(35);
      }
      if (parity==0){output_low(PS2_DATA_OUT);} // odd
      if (parity==1){output_high(PS2_DATA_OUT);} // even
      output_high(PS2_CLK_OUT); // clock for parity 9-th bit
      delay_us(35);
      output_low(PS2_CLK_OUT); // clock for parity 9-th bit
      delay_us(35);
//
      output_high(PS2_CLK_OUT);  // stop bit
      delay_us(35);
      output_low(PS2_CLK_OUT);
      output_high(PS2_DATA_OUT); // release data line
      delay_us(200);
}



thank you

Andre

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