And thats also why, on ASIC's and FPGA's where you have alot of different frequency domains occuring, you end up with several values of decoupling from 1uF...to .1uF to 100pF.  There is an entire science related to decoupling, where the lead inductance of the caps can negate the effect they have, so using small SMT with pad in hole is sometimes the solution that is required.  For PIC's and the like, usually don't have to worry about these issues.
  No. So that it rides out the current spikes caused by the chip itself. It
reduces the power supply impedence at high frequencies seen by the chip.


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