I need to improve on the speed of some
arbitrary-precision division and multiplication
routines written for the CCS (CCSinfo.com) compiler in
C code for the PIC18F8722.

I would like to find a 64/64 bit or 64/48 bit fixed or
floating point division routine in assembly for the
PIC.  I also require 48 bit multiplication.  So far I
have not had much luck in my search.  Does anybody
know if such a routine has been written?  I require a
great deal of precision in my application.  I am a
hardware engineer, assembly language is not my
specialty, so I would prefer not to reinvent the wheel
if possible.  The Matlab equations I must perform on
the PIC are attached.

Thanks,

Clay

format long;
Fout = 12.1*10^9            % desired output freq
FGHz = Fout/2;              % fundamental frequency
before doubler
Fref = 684.26*10^6;			% nominal reference freq
if FGHz < 6*10^9				% # of zeroed accumulator LSB's = 
	nz = 8;					%	8 for F < 6 GHz
else							%     7 for F >= 6 GHz
	nz = 7;
end
a = floor(2^20*(Fref/FGHz) + 0.5)	% accumulator value
seed1 = floor(a/2^nz)*2^nz;			% accumulator with LSB's
forced to zero
dr1 = 2^20/seed1;					% effective accumulator divide
ratio
Fref_act1 = FGHz/dr1;			% exact reference frequency
Fdds1 = (Fref_act1 - 600*10^6)*8 - 600*10^6;		% exact
DDS frequency
if abs(Fdds1 - 66.66666*10^6) < 0.4		% reduce
accumulator by 1 if DDS is close to 66.66666 MHz
	seed = floor(a/2^nz - 1)*2^nz
	dr = 2^20/seed
	Fref_act = FGHz/dr
	Fdds = (Fref_act1 - 600*10^6)*8 - 600*10^6
else
	seed = seed1
	Fref_act = Fref_act1
	dr = dr1
	Fdds = Fdds1
end
DDS_bits = floor(2^48*(Fdds/(300*10^6)) + 0.5)	% DDS
command bits



		
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