> >as I can see, it drives any pin that you write out a 1 to > with 1mA to > >the Vcc rail. So > > I see 100uA, with a pretty huge tolerance (~3:1 in either direction) > Look at IOHT which is 1mA for a short time. > Why can't you just use regular garden variety CMOS (HC or > LVC) logic and an SPI port (hardware or bit-banged)? Cheap & > easily available, now and 5 years from now. > > 74HC595, for example, even at full temperature and 6V Vcc is > rated for 80uA maximum. It will be much less typically. The > 74LV595 is 20uA maximum at 5.4V over temperature. It will be > much less typically. > > I really hate specifying single-sourced stuff if there's any > reasonable way around it. Oh so true! But the real problem is the input device (a parallel load, serial out) The 74x323 is the normal thing I have used before, but I can't find it in LC/LV/HC etc... I found LS in stock at rocelec.com but they want to quote so I don't know the price. I haven't used the 74x165 but it looks like the same thing? I can find it in the LV family for under a buck from many sources http://www.findchips.com/avail?part=74LV165 - - Specs: Icc: < 20uA Vcc: 2v < 6v http://rocky.digikey.com/WebLib/Texas%20Instruments/Web%20data/SN74LV165A.pd f So we should go with that right? Why didn't the hardware guy suggest it? And also in the HC family for pennies from many sources. http://www.findchips.com/avail?part=74HC165 - - Specs: Icc: < 40uA Vcc: 2v < 6v http://www.jameco.com/wcsstore/Jameco/Products/ProdDS/252161TI.pdf Also I can't find a good source for the LV595 http://www.findchips.com/avail?part=74LV595 everybody comes up "non-stock" for it. I can get it in the HC Family for pennies everywhere http://www.findchips.com/avail?part=74HC595 - - Specs: Icc: < 4uA Vcc: 2v < 6v http://www.st.com/stonline/books/pdf/docs/1989.pdf Which looks perfect to me... Any reason why I shouldn't recommend that? It's really freaking me out that these options were bypassed for that weird pseudo input and output at the same time chip. I'm not a hardware expert so I have to be really sure of myself before I say anything. The only thing I can see that makes a difference is that it is I2C addressable so we could expand to 16 or more IO without any additional uC pins (but you can stack on shift registers for that) and that it doesn't need extra pins for the input vice the output side. So what is the minimum number of micro pins to hook up 8+ bits of input AND output via shift registers? E.g. one parallel input shift out and one shift in parallel out. They can share the clock, but not latch and data so that is 5 lines, but there should be some clever way to reduce that count. I also seem to remember people putting a RC from the clock to the latch so that it would trigger a leading edge latch when the clock had been inactive for a bit? Just for reference: I guess these are the "usual suspects" for this sort of thing? 74x165 8-bit parallel load, shift out. 74x323 8-bit shift register with output and parallel load. Can't latch the existing output while loading a new one. But it works great for input since it can parallel load and shift out. As long as your output can "wiggle" during loads, this one chip can be configured as an input or output. (not both at once) 74x595 8-bit shift register with output latch Shift a new set in, then dump it to the outputs. Perfect for output. HC $0.14, no LC, LS $4<$7, LV ~$0.40 (no stock) 74x673 16-bit, shift and parallel latch or load. Perfect! Can be input or output (not both at once) Just a BIT expensive (F is $6<$24 EACH, LS $26<$56, no HC, no LV, etc...) --- James Newton: PICList webmaster/Admin mailto:jamesnewton@piclist.com 1-619-652-0593 phone http://www.piclist.com/member/JMN-EFP-786 PIC/PICList FAQ: http://www.piclist.com -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist